Engaging Undergraduate Students in Nano-Scale Circuit Research using Summer Internship

Hamid Mahmoodi1,  Jesus Garcia2,  Joshua Lohse2,  John Paulino2,  Hector Prado2,  Atul Balani1,  Sridevi Lakshmipuram1,  Cheng Chen1,  Amelito Enriquez2,  Hao Jiang1,  Wenshen Pong1,  Hamid Shanasser1
1San Francisco State University, 2Cañada College


Abstract

Semiconductor technology has been scaling at a steady pace following Moore’s law. The current generations of the technology have reached dimensions well below 100nm where nano-scale phenomena are prominent. Transistors in such a small scale behave very differently than the classic long channel devices taught in most undergraduate level textbooks. Moreover, there are new challenges in nano-scale circuit design, such as process variations and reliability issues that are not taught in undergraduate level courses. Working on latest technology issues is typically an opportunity available only to graduate level students working on related research projects. To address this gap, using a NASA Curriculum Improvements Partnership Award for the Integration of Research (CIPAIR) grant, we have created a summer internship program that engages community college students in research projects on the latest challenges of circuit design in nano-scale semiconductor technology. Through this program, four community college students were mentored by two graduate students in a research project to analyze performance degradation of integrated circuits due to transistor aging effects in nano-scale. In this research, analysis of transistor breakdown was performed through computer simulations to understand effects on circuit power and performance. A ring oscillator circuit was utilized as a generic logic circuit for this research. The breakdown was modeled by resistors placed between the transistor terminals. The value of the resistor represents the severity of the breakdown; large resistors represent fresh transistors, whereas low resistors represent a fully broken transistor. In addition to computer simulations, real ICs were studied by taking power measurements experimentally. This research aims to offer better insight into the impact of transistor breakdown and to improve IC design in nano-scale. Through this internship program, the undergraduate students not only contributed to research and discovery, but also gained valuable experience and knowledge of nano-scale circuits that could have not been achieved in traditional educational methods.